LSM303C Datasheet, PDF (45/53 Pages) –

LSM303C
Register description
Table 78. CTRL_REG3_M register description
I2C_DISABLE Disable I²C interface. Default value 0. (0: I²C enable; 1: I²C disable)
LP
Low-power mode configuration. Default value: 0
If this bit is ‘1’, the DO[2:0] is set to 0.625 Hz and the system performs, for each
channel, the minimum number of averages. Once the bit is set to ‘0’, the magnetic
data rate is configured by the DO bits in CTRL_REG1_M (20h) register.
SIM
SPI Serial Interface mode selection. Default value: 0
(0= SPI only write operations enabled; 1= SPI read and write operations enable).
MD[1:0]
Operating mode selection. Default value: 11
Refer to Table 79.
MD1
0
0
1
1
MD0
0
1
0
1
Table 79. System operating mode selection
Mode
Continuous-conversion mode
Single-conversion mode
Single-conversion mode has to be used with sampling frequency from 0.625 Hz
to 80 Hz.
Power-down mode
Power-down mode
8.32
CTRL_REG4_M (23h)
0⁽¹⁾
0⁽¹⁾
Table 80. CTRL_REG4_M register
0⁽¹⁾
0⁽¹⁾
OMZ1
OMZ0
1. These bits must be set to ‘0’ for the correct operation of the device
BLE
0⁽¹⁾
OMZ[1:0]
BLE
Table 81. CTRL_REG4_M register description
Z-axis operative mode selection.
Default value: 00. Refer to Table 82.
Big/Little Endian data selection. Default value: 0
(0: data LSb at lower address; 1: data MSb at lower address)
OMZ1
0
0
1
1
Table 82. Z-axis operative mode selection
OMZ0
Operative mode for Z-axis
0
Low-power mode
1
Medium-performance mode
0
High-performance mode
1
Ultra-high performance mode
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