LSM303C Datasheet, PDF (26/53 Pages) –

Digital interfaces
LSM303C
(MSb) first. If a receiver can’t receive another complete byte of data until it has performed
some other function, it can hold the clock line SCL LOW to force the transmitter into a wait
state. Data transfer only continues when the receiver is ready for another byte and releases
the data line. If a slave receiver doesn’t acknowledge the slave address (i.e. it is not able to
receive because it is performing some real-time function) the data line must be left HIGH by
the slave. The master can then abort the transfer. A LOW-to-HIGH transition on the SDA
line while the SCL line is HIGH is defined as a STOP condition. Each data transfer must be
terminated by the generation of a STOP (SP) condition.
In the presented communication format MAK is Master acknowledge and NMAK is No
Master Acknowledge.
Default Address:
The accelerometer sensor slave address is 0011101b while magnetic sensor slave address
is 0011110b.
The slave addresses are completed with a Read/Write bit. If the bit was ‘1’ (Read), a
repeated START (SR) condition must be issued after the two sub-address bytes. If the bit is
‘0’ (Write) the master will transmit to the slave with direction unchanged. Table 16 and
Table 17 explain how the SAD+Read/Write bit pattern are composed, listing all the possible
configurations.
Linear acceleration sensor: the default (factory setting) 7-bit slave address is
0011101b.
Command
Read
Write
Table 16. SAD + Read/Write patterns
SAD[6:0]
R/W
SAD + R/W
0011101
1
00111011 (3Bh)
0011101
0
00111010 (3Ah)
Magnetic field sensor: the default (factory setting) 7-bit slave address is 0011110b.
Command
Read
Write
Table 17. SAD + Read/Write patterns
SAD[6:0]
R/W
SAD + R/W
001110
1
00111101 (3Dh)
001110
0
00111100 (3Ch)
6.2
SPI bus interface
The LSM303C SPI is a bus slave. The SPI allows writing and reading the registers of the
device.
The serial interface interacts with the outside world with 3 wires: CS_XL, CS_MAG, SPC,
SDI.
3-wire mode is entered by setting the CTRL_REG4_A (SIM) and CTRL_REG3_M (SIM) bit
equal to ‘1’ (SPI serial interface mode selection).
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