LSM303C Datasheet, PDF (22/53 Pages) –

Application hints
5
Application hints
LSM303C
Figure 8. LSM303C electrical connections
Vdd_IO
C₄=100nF
Vdd
SCL/SPC
CS_XL
CS_MAG
SDA/SDI/SDO
1
12
11
Vdd_IO
10
Vdd
TOP VIEW
GND
45
INT_MAG
67
C₁=100nF
C₂=10µF
C₃=100nF
GND
Digital signal from/to signal controller. Signal levels are defined by proper selection of Vdd_IO.
The device core is supplied through the Vdd line while the I/O pads are supplied through the
Vdd_IO line. Power supply decoupling capacitors (100 nF ceramic, 10 μF aluminum) should
be placed as near as possible to pin 9 of the device (common design practice).
All the voltage and ground supplies must be present at the same time to have proper
behavior of the IC (refer to Figure 8). It is possible to remove Vdd, maintaining Vdd_IO,
without blocking the communication bus, in this condition the measurement chain is
powered off.
The functionality of the device and the measured acceleration data are selectable and
accessible through the I²C or SPI interfaces. When using the I²C, CS must be tied high (i.e.
connected to Vdd_IO).
The functions, the threshold and the timing of the two interrupt pins (INT_XL and INT_MAG)
can be completely programmed by the user through the I²C/SPI interface.
5.1
Soldering information
The LGA package is compliant with the ECOPACK^®, RoHS and “Green” standards.
It is qualified for soldering heat resistance according to JEDEC J-STD-020.
Leave “Pin 1 Indicator” unconnected during soldering.
Land pattern and soldering recommendations are available at www.st.com.
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DocID024975 Rev 2