M36W432T Datasheet, PDF (44/57 Pages) STMicroelectronics – 32 Mbit 2Mb x16, Boot Block Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product

M36W432T, M36W432B
APPENDIX B. COMMON FLASH INTERFACE (CFI)
The Common Flash Interface is a JEDEC ap-
proved, standardized data structure that can be
read from the Flash memory device. It allows a
system software to query the device to determine
various electrical and timing parameters, density
information and functions supported by the mem-
ory. The system can interface easily with the de-
vice, enabling the software to upgrade itself when
necessary.
When the CFI Query Command (RCFI) is issued
the device enters CFI Query mode and the data
structure is read from the memory. Tables 28, 29,
30, 31, 32 and 33 show the addresses used to re-
trieve the data.
The CFI data structure also contains a security
area where a 64 bit unique security number is writ-
ten (see Table 33, Security Code area). This area
can be accessed only in Read mode by the final
user. It is impossible to change the security num-
ber after it has been written by ST. Issue a Read
command to return to Read mode.
Table 28. Query Structure Overview
Offset
Sub-section Name
00h Reserved
10h CFI Query Identification String
1Bh System Interface Information
27h Device Geometry Definition
P
Primary Algorithm-specific Extended Query table
A
Alternate Algorithm-specific Extended Query table
Note: Query data are always presented on the lowest order data outputs.
Description
Reserved for algorithm-specific information
Command set ID and algorithm data offset
Device timing & voltage information
Flash device layout
Additional information specific to the Primary
Algorithm (optional)
Additional information specific to the Alternate
Algorithm (optional)
Table 29. CFI Query Identification String
Offset
Data
Description
Value
00h
0020h Manufacturer Code
ST
01h
88BAh
88BBh
Device Code
Top
Bottom
02h-0Fh reserved Reserved
10h
0051h
"Q"
11h
0052h Query Unique ASCII String "QRY"
"R"
12h
0059h
"Y"
13h
0003h _{Primary Algorithm Command Set and Control Interface ID code 16 bit ID code}
Intel
14h
0000h ^{defining a specific algorithm}
compatible
15h
0035h
Address for Primary Algorithm extended Query table (see Table 31)
16h
0000h
P = 35h
17h
18h
0000h
0000h
Alternate Vendor Command Set and Control Interface ID Code second vendor -
specified algorithm supported (0000h means none exists)
NA
19h
0000h _{Address for Alternate Algorithm extended Query table}
1Ah
0000h ^{(0000h means none exists)}
NA
Note: Query data are always presented on the lowest order data outputs (DQ7-DQ0) only. DQ8-DQ15 are ‘0’.
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