M36W432T Datasheet, PDF (15/57 Pages) STMicroelectronics – 32 Mbit 2Mb x16, Boot Block Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product

M36W432T, M36W432B
Block Lock-Down Command. A locked block
cannot be Programmed or Erased, or have its
Lock status changed when WP is low, V_IL. When
WP is high, V_IH, the Lock-Down function is dis-
abled and the locked blocks can be individually un-
locked by the Block Unlock command.
Two Bus Write cycles are required to issue the
Block Lock command.
s The first bus cycle sets up the Block Lock
command.
s The second Bus Write cycle latches the block
address.
The Lock Status can be monitored for each block
using the Read Block Signature command.
Locked blocks revert to the protected (and not
locked) state when the device is reset on power-
down. Table. 9 shows the Lock Status after issuing
a Block Lock-Down command. Refer to the sec-
tion, Block Locking, for a detailed explanation.
Table 3. Commands
Bus Write Operations
Commands
No. of
Cycles
1st Cycle
Bus
Op.
Addr Data
2nd Cycle
Bus
Op.
Addr
Data
3nd Cycle
Bus
Op.
Addr
Data
Read Memory Array
1+
Write X
FFh Read
Read
Addr
Data
Read Status Register
1+
Write X
70h Read
X
Status
Register
Read Electronic Signature 1+
Write X
Signature
90h Read _{Addr (1)} Signature
Read CFI Query
1+
Write 55h 98h Read CFI Addr Query
Erase
2
Write
X
20h Write
Block
Addr
D0h
Program
2
Write
X
40h or
10h
Write
Addr Data Input
Double Word Program⁽²⁾
3
Write
X
30h
Write
Addr 1 Data Input Write
Addr 2
Data
Input
Clear Status Register
1
Write
X
50h
Program/Erase Suspend
1
Write
X
B0h
Program/Erase Resume
1
Write X D0h
Block Lock
2
Write
X
60h
Write
Block
Address
01h
Block Unlock
2
Write
X
60h
Write
Block
Address
D0h
Block Lock-Down
2
Write
X
60h
Write
Block
Address
2Fh
Protection Register
Program
2
Write X C0h Write Address Data Input
Note: X = Don't Care.
1. The signature addresses are listed in Tables 4, 5 and 6.
2. Addr 1 and Addr 2 must be consecutive Addresses differing only for A0.
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