M36W432T Datasheet, PDF (14/57 Pages) STMicroelectronics – 32 Mbit 2Mb x16, Boot Block Flash Memory and 4 Mbit 256K x16 SRAM, Multiple Memory Product

M36W432T, M36W432B
Program/Erase Suspend Command. The Pro-
gram/Erase Suspend command is used to pause
a Program or Erase operation. One bus write cycle
is required to issue the Program/Erase command
and pause the Program/Erase controller.
During Program/Erase Suspend the Command In-
terface will accept the Program/Erase Resume,
Read Array, Read Status Register, Read Electron-
ic Signature and Read CFI Query commands. Ad-
ditionally, if the suspend operation was Erase then
the Program, Block Lock, Block Lock-Down or
Protection Program commands will also be ac-
cepted. The block being erased may be protected
by issuing the Block Protect, Block Lock or Protec-
tion Program commands. When the Program/
Erase Resume command is issued the operation
will complete. Only the blocks not being erased
may be read or programmed correctly.
During a Program/Erase Suspend, the device can
be placed in a pseudo-standby mode by taking
Chip Enable to V_IH. Program/Erase is aborted if
Reset turns to V_IL.
See Appendix C, Figure 27, Program or Double
Word Program Suspend & Resume Flowchart and
Pseudo Code, and Figure 29, Erase Suspend &
Resume Flowchart and Pseudo Code for flow-
charts for using the Program/Erase Suspend com-
mand.
Program/Erase Resume Command. The Pro-
gram/Erase Resume command can be used to re-
start the Program/Erase Controller after a
Program/Erase Suspend operation has paused it.
One Bus Write cycle is required to issue the com-
mand. Once the command is issued subsequent
Bus Read operations read the Status Register.
See Appendix C, Figure 27, Program or Double
Word Program Suspend & Resume Flowchart and
Pseudo Code, and Figure 29, Erase Suspend &
Resume Flowchart and Pseudo Code for flow-
charts for using the Program/Erase Resume com-
mand.
Protection Register Program Command. The
Protection Register Program command is used to
Program the 64 bit user One-Time-Programmable
(OTP) segment of the Protection Register. The
segment is programmed 16 bits at a time. When
shipped all bits in the segment are set to ‘1’. The
user can only program the bits to ‘0’.
Two write cycles are required to issue the Protec-
tion Register Program command.
s The first bus cycle sets up the Protection
Register Program command.
s The second latches the Address and the Data to
be written to the Protection Register and starts
the Program/Erase Controller.
Read operations output the Status Register con-
tent after the programming has started.
The segment can be protected by programming bit
1 of the Protection Lock Register. Bit 1 of the Pro-
tection Lock Register protects bit 2 of the Protec-
tion Lock Register. Programming bit 2 of the
Protection Lock Register will result in a permanent
protection of the Security Block (see Figure 6,
Flash Security Block Memory Map). Attempting to
program a previously protected Protection Regis-
ter will result in a Status Register error. The pro-
tection of the Protection Register and/or the
Security Block is not reversible.
The Protection Register Program cannot be sus-
pended.
Block Lock Command. The Block Lock com-
mand is used to lock a block and prevent Program
or Erase operations from changing the data in it.
All blocks are locked at power-up or reset.
Two Bus Write cycles are required to issue the
Block Lock command.
s The first bus cycle sets up the Block Lock
command.
s The second Bus Write cycle latches the block
address.
The Lock Status can be monitored for each block
using the Read Block Signature command. Table.
9 shows the Lock Status after issuing a Block Lock
command.
The Block Lock bits are volatile, once set they re-
main set until reset or power-down/power-up.
They are cleared by a Blocks Unlock command.
Refer to the section, Block Locking, for a detailed
explanation.
Block Unlock Command. The Blocks Unlock
command is used to unlock a block, allowing the
block to be programmed or erased. Two Bus Write
cycles are required to issue the Blocks Unlock
command.
s The first bus cycle sets up the Block Unlock
command.
s The second Bus Write cycle latches the block
address.
The Lock Status can be monitored for each block
using the Read Block Signature command. Table.
9 shows the Lock Status after issuing a Block Un-
lock command. Refer to the section, Block Lock-
ing, for a detailed explanation.
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