LAN91C96I Datasheet, PDF (94/110 Pages) SMSC Corporation – NON-PCI SINGLE-CHIP FULL DUPLES ETHERNET CONTROLLER

Non-PCI Single-Chip Full Duplex Ethernet Controller
A0-15
AEN,
nSBHE
nIOCS16
VALID ADDRESS
nIORD
nIOWR
Z
IOCHRDY
t20
t9
Z
t10
D0-D15
Z
Z
VALID DATA
VALID ADDRESS
Z
VALID DATA
Parameter
t9
Control Active to IOCHRDY Low
t10 IOCHRDY Low Pulse Width*
t20 Cycle time**
min
typ
max units
12
ns
100
150
ns
185
ns
*Note: Assuming NO WAIT ST = 0 in configuration register and cycle time observed.
**Note: The cycle time is defined only for accesses to the Data Register as follows:
For Data Register Read - From nIORD falling to next nIORD falling
For Data Register Write - From nIOWR rising to next nIOWR rising
FIgure 12.3 – Local Bus Consecutive Read and Write Cycles
Rev. 11/18/2004
Page 94
DATASHEET
SMSC DS – LAN91C96I