LAN91C96I Datasheet, PDF (30/110 Pages) SMSC Corporation – NON-PCI SINGLE-CHIP FULL DUPLES ETHERNET CONTROLLER

Non-PCI Single-Chip Full Duplex Ethernet Controller
Chapter 6 Packet Format in Buffer memory for
Ethernet
The packet format in memory is similar to that in the TRANSMIT and RECEIVE areas. The first word is
reserved for the status word, the next word is used to specify the total number of bytes, and that in turn is
followed by the data area. The data area holds the packet itself, and its length is determined by the byte
count. The packet memory format is word oriented.
bit15
RAM
OFFSET
2nd Byte
(DECIMAL)
0
2
RESERVED
4
bit0
1st Byte
STATUS WORD
BYTE COUNT (always even)
DATA AREA
1534 Max
CONTROL BYTE
Last Byte
LAST DATA BYTE (if odd)
Figure 6.1 – Data Packet Format
STATUS WORD
BYTE COUNT
DATA AREA
CONTROL BYTE
TRANSMIT PACKET
RECEIVE PACKET
Written by CSMA upon transmit Written by CSMA upon receive
completion (see Status Register) completion (see RX Frame
Status Word)
Written by CPU
Written by CSMA
Written/modified by CPU
Written by CSMA
Written by CPU to control
ODD/EVEN data bytes
Written by CSMA. Also has
ODD/EVEN bit
Rev. 11/18/2004
Page 30
DATASHEET
SMSC DS – LAN91C96I