COM200221 Datasheet, PDF (9/82 Pages) SMSC Corporation – 10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM

10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM
Datasheet
PIN NO
NAME
24
nPulse 1
25
nPulse 2
28
Receive In
29
nTransmit
Enable
21
Crystal
22
Oscillator
8,20,
32,43
6,11,
18,23,
30,41
19,27
Power
Supply
Ground
N/C
SYMBOL
I/O
DESCRIPTION
TRANSMISSION MEDIA INTERFACE
nPULSE1
nPULSE2
OUT
I/O
In Normal Mode, these active low signals carry the transmit
data information, encoded in pulse format as DIPULSE
waveform. In Backplane Mode, the nPULSE1 signal driver
is programmable (push/pull or open-drain), while the
nPULSE2 signal provides a clock with frequency of doubled
data rate. nPULSE1 is connected to a weak internal pull-up
resistor on the open/drain driver in backplane mode.
RXIN
IN
This signal carries the receive data information from the line
transceiver.
nTXEN
OUT
Transmission Enable signal. Active polarity is
programmable through the nPULSE2 pin.
nPULSE2 floating before power-up;
nTXEN active low
nPULSE2 grounded before power-up;
nTXEN active high (this option is only available in Back
Plane mode)
XTAL1
XTAL2
IN
OUT
An external crystal should be connected to these pins.
Oscillation frequency range is from 10 MHz to 20 MHz. If
an external TTL clock is used instead, it must be connected
to XTAL1 with a 390ohm pull-up resistor, and XTAL2 should
be left floating.
VDD
PWR +5 Volt power supply pins.
VSS
PWR Ground pins.
N/C
Non-connection
SMSC COM20022I
Page 9
DATASHEET
Revision 09-27-07