COM200221 Datasheet, PDF (27/82 Pages) SMSC Corporation – 10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM

10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM
Datasheet
RT
75176B or
Equiv.
+VCC
RBIAS
+VCC
RBIAS
RT
+VCC
RBIAS
COM20022I
COM20022I
COM20022I
Figure 5.8 - COM20022I Network Using RS-485 Differential Transceivers
1
1
0
20MHZ
CLOCK
(FOR REF.
ONLY)
100ns
nPULSE1
100ns
nPULSE2
200ns
DIPULSE
RXIN
400ns
Figure 5.9 - Dipulse Waveform for Data of 1-1-0
In typical applications, the serial backplane is terminated at both ends and a bias is provided by the
external pull-up resistor.
The RXIN signal is directly connected to the cable via an internal Schmitt trigger. A negative pulse on this
input indicates a logic "1". Lack of pulse indicates a logic "0". For typical single-ended backplane
applications, RXIN is connected to nPULSE1 to make the serial backplane data line. A ground line (from
the coax or twisted pair) should run in parallel with the signal. For applications requiring different treatment
of the receive signal (like filtering or squelching), nPULSE1 and RXIN remain as independent pins.
External differential drivers/receivers for increased range and common mode noise rejection, for example,
would require the signals to be independent of one another. When the device is in Backplane Mode, the
clock provided by the nPULSE2 signal may be used for encoding the data into a different encoding
scheme or other synchronous operations needed on the serial data stream.
SMSC COM20022I
Page 27
DATASHEET
Revision 09-27-07