COM200221 Datasheet, PDF (74/82 Pages) SMSC Corporation – 10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM

10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM
Datasheet
nCS
nREFEX
t19
t20
t19
t20
t10
t3
t26
t3
DREQ
nDACK
t6
t2
t21
t24
t5
t4
t1
t25
t7*
t24
t25
TC
t15
nWR
nRD
Write LOW-POINTER
when DMAEN=1
DATA
(D15-D0)
t11
t16
t12
t14
t8
t9
VALID
Note*: t7 is measured from the latest active timing among TC, Write/Read.
t13
t18
t17
VALID
Figure 8.17 - DMA Timing (Intel Mode 80XX)
Revision 09-27-07
Page 74
DATASHEET
SMSC COM20022I