COM200221 Datasheet, PDF (75/82 Pages) SMSC Corporation – 10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM

10 Mbps ARCNET (ANSI 878.1) Controller with 2Kx8 On-Chip RAM
Datasheet
nCS
nREFEX
t19
t20
t19
t20
t10
t3
t26
t3
DREQ
nDACK
t6
t2
t21
t24
t5
t4
t1
t25
t7*
t24
t25
TC
t15
t16
DIR
VALID
VALID
t22
t11
t23
t22
t23
nDS
DATA
(D15-D0)
Write LOW-POINTER
when DMAEN=1
t12
t14
t8
t9
VALID
t13
t18
t17
VALID
Note*: t7 is measured from the latest active timing among TC, Write/Read.
Figure 8.18 - DMA Timing (Motorola Mode 68XX)
SMSC COM20022I
Page 75
DATASHEET
Revision 09-27-07