LAN9730 Datasheet, PDF (61/61 Pages) SMSC Corporation – High-Speed Inter-Chip (HSIC) USB 2.0

High-Speed Inter-Chip (HSIC) USB 2.0 to 10/100 Ethernet Controller
Datasheet
Chapter 8 Datasheet Revision History
REVISION LEVEL
AND DATE
Rev. 1.1 (05-13-13)
Rev. 1.0 (10-11-11)
Table 8.1 Customer Revision History
SECTION/FIGURE/ENTRY
CORRECTION
Cover Page
Section 6.1, "Absolute Maximum
Ratings*," on page 41
Section 6.4, Table 6.11, “I/O Buffer
Characteristics,” on page 46
Section 6.5.2, "Power Sequence
Timing," on page 49
Section 6.5.2, Table 6.14, “Power
Sequence Timing Values,” on
page 49
Section 6.5.5, "EEPROM Timing,"
on page 52
All
 Added Win 8 driver support
 Changed positive voltage on XI from
‘VDD33IO + 0.3 V’ to ‘VDD12CORE’
 Defeatured positive voltage on XO
 Updated ICLK V_ILI max from ‘0.5’ to ‘0.35’
 Updated ICLK V_IHI min from ‘VDD12 CORE -
0.35’ to ‘3.3 - 0.35’
 Updated ICLK V_IHI max from ‘VDD12 CORE’ to
‘3.3’
 Added additional bullet to rules list: ‘It is
acceptable for the 3.3 V power supplies to
remain powered up ...’
 Changed value of t_pon from ‘25 ms’ to ‘750 ms’
 Defeatured t_cklinvld from diagram and table
Initial release
SMSC LAN9730/LAN9730i
61
DATASHEET
Revision 1.1 (05-13-13)