LAN9730 Datasheet, PDF (19/61 Pages) SMSC Corporation – High-Speed Inter-Chip (HSIC) USB 2.0

High-Speed Inter-Chip (HSIC) USB 2.0 to 10/100 Ethernet Controller
Datasheet
Table 2.4 Miscellaneous Pins (continued)
NUM PINS
NAME
1
Ethernet
Speed
Indicator LED
General
Purpose I/O
10
SYMBOL
nSPD_LED
GPIO10
1
Core
CORE_REG_EN
Regulator
Enable
1
Test 1
TEST1
1
Test 2
TEST2
1
Crystal Input
XI
1
Crystal
XO
Output
BUFFER
TYPE
DESCRIPTION
OD12
(PU)
IS/O12/
OD12
(PU)
AI
-
This pin is driven low (LED on) when the Ethernet
operating speed is 100 Mbs, or during auto-
negotiation. This pin is driven high during 10 Mbs
operation or during line isolation.
This General Purpose I/O pin is fully
programmable as either a push-pull output, an
open-drain output or a Schmitt-triggered input.
Note:
This pin may serve as a wakeup pin
whose detection mode is selectable
when External PHY and PME Modes of
operation are in effect. Refer to
Chapter 5, "PME Operation," on
page 37 for additional information.
Note: By default this pin is configured as a
GPIO.
This pin enables/disables the internal core logic
voltage regulator.
When tied low to VSS, the internal core regulator
is disabled and +1.2 V must be supplied to the
device by an external source.
When tied high to +3.3 V, the internal core
regulator is enabled.
Refer to Chapter 3, "Power Connections," on
page 24 and the device reference schematics for
connection information.
This pin must always be connected to VSS for
proper operation.
-
This pin must always be connected to +3.3 V for
proper operation.
ICLK
OCLK
External 25 MHz crystal input.
Note:
This pin can also be driven by a single-
ended clock oscillator. When this
method is used, XO should be left
unconnected
External 25 MHz crystal output.
SMSC LAN9730/LAN9730i
19
DATASHEET
Revision 1.1 (05-13-13)