LAN9730 Datasheet, PDF (57/61 Pages) SMSC Corporation – High-Speed Inter-Chip (HSIC) USB 2.0

High-Speed Inter-Chip (HSIC) USB 2.0 to 10/100 Ethernet Controller
Datasheet
6.5.8
JTAG Timing
This section specifies the JTAG timing of the device.
TCK (Input)
t_tckp
t_tckhl
t_tckhl
t_su
t_h
TDI, TMS (Inputs)
t_dov
t_doinvld
TDO (Output)
Figure 6.10 JTAG Timing
Table 6.22 JTAG Timing Values
SYMBOL
t_tckp
t_tckhl
t_su
t_h
t_dov
t_doinvld
DESCRIPTION
TCK clock period
TCK clock high/low time
TDI, TMS setup to TCK rising edge
TDI, TMS hold from TCK rising edge
TDO output valid from TCK falling edge
TDO output invalid from TCK falling edge
MIN
66.67
t_tckp*0.4
10
10
0
MAX
t_tckp*0.6
16
UNITS
ns
ns
ns
ns
ns
ns
NOTES
SMSC LAN9730/LAN9730i
57
DATASHEET
Revision 1.1 (05-13-13)