LAN9730 Datasheet, PDF (51/61 Pages) SMSC Corporation – High-Speed Inter-Chip (HSIC) USB 2.0

High-Speed Inter-Chip (HSIC) USB 2.0 to 10/100 Ethernet Controller
Datasheet
6.5.4
Reset and Configuration Strap Timing
Figure 6.4 illustrates the nRESET pin timing requirements and its relation to the configuration strap
pins and output drive. Assertion of nRESET is not a requirement. However, if used, it must be asserted
for the minimum period specified.
nRESET
Configuration
Strap Pins
Output Drive
t_rstia
t_css
t_csh
t_odad
Figure 6.4 nRESET Reset Pin Timing
SYMBOL
t_rstia
t_css
t_csh
t_odad
Table 6.16 nRESET Reset Pin Timing Values
DESCRIPTION
MIN
nRESET input assertion time
1
Configuration strap pins setup to nRESET deassertion
200
Configuration strap pins hold after nRESET deassertion 10
Output drive after nRESET deassertion
30
TYP
MAX UNITS
µs
ns
ns
ns
SMSC LAN9730/LAN9730i
51
DATASHEET
Revision 1.1 (05-13-13)