LAN9730 Datasheet, PDF (13/61 Pages) SMSC Corporation – High-Speed Inter-Chip (HSIC) USB 2.0

High-Speed Inter-Chip (HSIC) USB 2.0 to 10/100 Ethernet Controller
Datasheet
Table 2.1 MII Interface Pins (continued)
NUM PINS
NAME
1
Management
Clock
(Internal PHY
Mode)
Management
Clock
(External
PHY Mode)
General
Purpose I/O 2
(Internal PHY
Mode Only)
1
Transmit Data
3
(Internal PHY
Mode)
Transmit Data
3
(External
PHY Mode)
General
Purpose I/O 7
(Internal PHY
Mode Only)
HSIC Output
Impedance
Configuration
Strap
SYMBOL
MDC
MDC
GPIO2
TXD3
TXD3
GPIO7
50DRIVER_EN
BUFFER
TYPE
DESCRIPTION
IS/O8
(PU)
In Internal PHY Mode, this pin can be configured
to display the respective internal MII signal.
O8
(PD)
In External PHY Mode, this pin outputs the
management clock to the external PHY.
IS/O8/
OD8
(PU)
This General Purpose I/O pin is fully
programmable as either a push-pull output, an
open-drain output or a Schmitt-triggered input.
IS/O8
(PU)
In Internal PHY Mode, this pin can be configured
to display the respective internal MII signal.
O8
(PU)
In External PHY Mode, this pin functions as the
transmit data 3 output to the external PHY.
IS/O8/
OD8
(PU)
IS
(PU)
This General Purpose I/O pin is fully
programmable as either a push-pull output, an
open-drain output or a Schmitt-triggered input.
Note: GPIO7 may provide additional external
PHY Link Up related functionality.
The 50DRIVER_EN strap selects the driver
output impedance for the HSIC_DATA and
HSIC_STROBE pins.
0 = 40 Ω output impedance
1 = 50 Ω output impedance
See Note 2.1 for more information on
configuration straps.
SMSC LAN9730/LAN9730i
13
DATASHEET
Revision 1.1 (05-13-13)