COM20019I_0610 Datasheet, PDF (48/70 Pages) SMSC Corporation – Cost Competitive ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM

RAM
Cost Competitive ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip
PARAMETER
SYMBOL
MIN
TYP MAX UNIT
COMMENT
Low Output Voltage 2
V_OL2
(AD0-AD2, D3-D7, nINTR,
nPULSE1 in Push/Pull
Mode, nPULSE2)
0.4
V I_SINK=8mA
High Output Voltage 2
(AD0-AD2, D3-D7, nINTR,
nPULSE1 in Push/Pull
Mode, nPULSE2)
Low Output Voltage 3
(nPULSE1 in Open-Drain
Mode)
Dynamic V_DD Supply
Current
Input Pull-up Current
(nPULSE1 in Open-Drain
Mode, A1, AD0-AD2,
D3-D7, BUSTMG)
V_OH2
V_OL3
I_DD
I_P
2.4
V I_SOURCE=-4mA
0.4
V I_SINK=8mA
Open Drain Driver
25
mA 312.5 Kbps
All Outputs Open
80
200
µA V_IN=0.0V
Input Leakage Current
I_L
(All inputs except A1,
AD0-AD2, D3-D7,
XTAL1, BUSTMG)
±10
µA V_SS < V_IN < V_DD
CAPACITANCE (T_A = 25°C; f_C = 1MHz; V_DD = 0V)
Output and I/O pins capacitive load specified as follows:
PARAMETER
SYMBOL MIN TYP
Input Capacitance
Output Capacitance 1
(All outputs except
C_IN
C_OUT1
XTAL2)
MAX
5.0
45
UNIT
pF
pF
COMMENT
Maximum
Capacitive Load
which can be
supported by each
output.
Rev. 10-31-06
Page 48
DATASHEET
SMSC COM20019I 3.3V Rev.C