COM20019I_0610 Datasheet, PDF (4/70 Pages) SMSC Corporation – Cost Competitive ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM

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Cost Competitive ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip
6.6.1 Internal Reset Logic................................................................................................................................43
6.7 INITIALIZATION SEQUENCE ....................................................................................................... 43
6.7.1 Bus Determination ..................................................................................................................................43
6.8 IMPROVED DIAGNOSTICS .......................................................................................................... 44
6.8.1 Normal Results: ......................................................................................................................................45
6.8.2 Abnormal Results: ..................................................................................................................................45
6.9 OSCILLATOR ................................................................................................................................ 45
Chapter 7 Operational Description .................................................................................................... 47
7.1 MAXIMUM GUARANTEED RATINGS* ......................................................................................... 47
7.2 DC ELECTRICAL CHARACTERISTICS........................................................................................ 47
Chapter 8 Timing Diagrams................................................................................................................ 50
Chapter 9 Package Outlines ................................................................................................................ 64
9.1 28 Pin PLCC Package Outline and Parameters ............................................................................ 64
9.2 48 Pin TQFP Package Outline and Parameters ............................................................................ 65
Chapter 10 Appendix A...................................................................................................................... 66
10.1 NOSYNC Bit................................................................................................................................... 66
10.2 EF Bit.............................................................................................................................................. 66
Chapter 11 Appendix B ...................................................................................................................... 69
Chapter 12 Appendix C...................................................................................................................... 70
12.1 Software Identification of the COM20019I 3V Rev B and Rev C................................................... 70
Rev. 10-31-06
Page 4
DATASHEET
SMSC COM20019I 3.3V Rev.C