COM20019I_0610 Datasheet, PDF (10/70 Pages) SMSC Corporation – Cost Competitive ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM

RAM
Cost Competitive ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip
PIN NO
PLCC TQFP
18
24
19
25
20
28
21
29
16
21
17
22
15, 28
7, 14,
22
13
8, 20,
32, 43
6, 11,
18, 23,
30, 41
3, 5,
14-17,
19, 27,
33, 35,
38, 40,
42, 47,
48
NAME
nPulse 1
nPulse 2
Receive In
nTransmit
Enable
Crystal
Oscillator
Power
Supply
Ground
SYMBOL
I/O
DESCRIPTION
TRANSMISSION MEDIA INTERFACE
nPULSE1
nPULSE2
RXIN
OUT
I/O
IN
In Normal Mode, these active low signals carry the
transmit data information, encoded in pulse format
as DIPULSE waveform. In Backplane Mode, the
nPULSE1 signal driver is programmable (push/pull
or open-drain), while the nPULSE2 signal provides
a clock with frequency of doubled data rate.
nPULSE1 is connected to a weak internal pull-up
resistor on the open/drain driver in backplane
mode.
This signal carries the receive data information from
the line transceiver.
nTXEN
OUT Transmission Enable signal. Active polarity is
programmable through the nPULSE2 pin.
nPULSE2 floating before power-up;
nTXEN active low
nPULSE2 grounded before power-up;
XTAL1
XTAL2
IN
OUT
nTXEN active high (this option is only available in
Back Plane mode)
An external crystal should be connected to these
pins. Oscillation frequency range is from 10 MHz to
20 MHz. If an external TTL clock is used instead, it
must be connected to XTAL1 with a 390ohm pull-up
resistor, and XTAL2 should be left floating.
VDD
PWR +3.3 Volt power supply pins.
VSS
PWR Ground pins.
N/C
N/C
Non-connection
Rev. 10-31-06
Page 10
DATASHEET
SMSC COM20019I 3.3V Rev.C