SI5375 Datasheet, PDF (43/54 Pages) Silicon Laboratories – 4-PLL ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Si5375
7.1. ICAL
The device registers must be configured for the device operation. After device configuration, a calibration
procedure must be performed once a stable clock is applied to the selected CKINn input. The calibration process is
triggered by writing a “1” to bit D6 in register 136. See the Family Reference Manual for details. In addition, after a
successful calibration operation, changing any of the registers indicated in Table 8 requires that a calibration be
performed again by the same procedure (writing a “1” to bit D6 in register 136).
Table 8. ICAL-Sensitive Registers
Address
0
0
2
2
5
10
11
19
19
25
31
40
40
43
46
Register
BYPASS_REG
CKOUT_ALWAYS_ON
BSWEL_REG
RATE_REG
ICMOS
DSBL_REG
PD_CK
LOCKT
VALTIME
N1_HS
NC1_LS
N2_HS
N2_LS
N31
N32
Rev. 1.0
43