SI5375 Datasheet, PDF (24/54 Pages) Silicon Laboratories – 4-PLL ANY-FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Si5375
Register 6.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
SFOUT_REG [2:0]
Type
R
R
R
R
R
R/W
Reset value = 0010 1101
Bit
Name
Function
7:3
Reserved
2:0 SFOUT_REG [2:0] SFOUT_REG [2:0].
Controls output signal format and disable for CKOUT1 output buffer.
000: Reserved
001: Disable
010: CMOS
011: Low swing LVDS
100: Reserved
101: LVPECL, only available when V_DD = 2.5 V
110: CML
111: LVDS
Register 8.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
Name
HLOG_1[1:0]
Type
R
R
R/W
R
R
R
R
Reset value = 0000 0000
Bit
Name
Function
7:6 Reserved
5:4 HLOG_1 [1:0] HLOG_1 [1:0].
00: Normal operation
01: Holds CKOUT_n output at static logic 0. Entrance and exit from this state will occur
without glitches or runt pulses.
10: Holds CKOUT_n output at static logic 1. Entrance and exit from this state will occur
without glitches or runt pulses.
11: Reserved
3:0 Reserved
24
Rev. 1.0