SI5315B-C-GM Datasheet, PDF(37/54 Page) Silicon Laboratories – SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER

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SI5315B-C-GM Datasheet, PDF (37/54 Pages) Silicon Laboratories – SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER

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SFOUT[1:0] = LM (Output Disable)

Si5315

Output from

DSPLL

100 ï

CKOUTn

Figure 17. Disable CKOUTn Structure

The SFOUT [1:0] pins can also be used to disable both outputs. Disabling the output puts the CKOUTn+ and

CKOUTnâ pins in a high-impedance state relative to VDD (common mode tri-state) while the two outputs remain

connected to each other through a 200 ï on-chip resistance (differential impedance of 200 ï). The maximum

amount of internal circuitry is powered down, minimizing power consumption and noise generation. Recovery from

the disable mode requires additional time as specified in Table 3, âAC Characteristicsâ.

Rev. 1.0

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