SI5315B-C-GM Datasheet, PDF (35/54 Pages) Silicon Laboratories – SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER

Si5315
C
CML/
LVDS
Driver
100 
C
Si5315
40 k
40 k
CKIN +
300 
CKIN ^_
± ^VICM
Figure 13. CML/LVDS Termination (1.8, 2.5, 3.3 V)
CMOS Driver
V_DD
R1
33 ohms
V_DD
V_DD
Si5315
R3
50
150 ohms
V_ICM
R2
See Table
C1 _CKIN+ R5 40 kohm
R4
150 ohms
100 nF
CKIN–
C2
R6 40 kohm
100 nF
V_DD
R2
Notes
3.3 V
2.5 V
1.8 V
100 ohm
49.9 ohm
14.7 ohm
Locate R1 near CMOS driver
Locate other components near Si5317
Recalculate resistor values for other drive strengths
Additional Notes:
1. Attenuation circuit limits overshoot and undershoot.
2. Not to be used with non-square wave input clocks.
Figure 14. CMOS Termination (1.8, 2.5, 3.3 V)
Rev. 1.0
35