SI5315B-C-GM Datasheet, PDF (12/54 Pages) Silicon Laboratories – SYNCHRONOUS ETHERNET/TELECOM JITTER ATTENUATING CLOCK MULTIPLIER

Si5315
1.2. Three-Level (3L) Input Pins (With External Resistors)
V_DD
I_imm ^{18 k}
V_DD
Si5315
75 k
External Driver
18 k
75 k
One of eight resistors from a Panasonic EXB-D10C183J
(or similar) resistor pack
Figure 4. Three Level Input Pins
Table 6. Three-Level Input Pins (With External Resistors)
Parameter
Symbol
Min
Max
Input Low Current
Iill
–30 µA
—
Input Mid Current
Iimm
–11 µA
–11 µA
Input High Current
Iihh
—
–30 µA
Note: The above currents are the amount of leakage that the 3L inputs can tolerate from an external driver.
 Any resistor pack may be used.
The Panasonic EXB-D10C183J is an example.
PCB layout is not critical.
 Resistor packs are only needed if the leakage current of the external driver exceeds the listed currents.
 If a pin is tied to ground or V_DD, no resistors are needed.
 If a pin is left open (no connect), no resistors are needed.
12
Rev. 1.0