C8051T630 Datasheet, PDF (3/221 Pages) Silicon Laboratories – Mixed-Signal Byte-Programmable EPROM MCU

C8051T630/1/2/3/4/5
Table of Contents
1. System Overview ..................................................................................................... 15
2. Ordering Information ............................................................................................... 17
3. Pin Definitions.......................................................................................................... 18
4. QFN-20 Package Specifications ............................................................................. 21
5. Electrical Characteristics ........................................................................................ 23
5.1. Absolute Maximum Specifications..................................................................... 23
5.2. Electrical Characteristics ................................................................................... 24
5.3. Typical Performance Curves ............................................................................. 32
6. 10-Bit ADC (ADC0, C8051T630/2/4 only)................................................................ 33
6.1. Output Code Formatting .................................................................................... 34
6.2. 8-Bit Mode ......................................................................................................... 34
6.3. Modes of Operation ........................................................................................... 34
6.3.1. Starting a Conversion................................................................................ 34
6.3.2. Tracking Modes......................................................................................... 35
6.3.3. Settling Time Requirements...................................................................... 36
6.4. Programmable Window Detector....................................................................... 40
6.4.1. Window Detector Example........................................................................ 42
6.5. ADC0 Analog Multiplexer (C8051T630/2/4 only)............................................... 43
7. Temperature Sensor (C8051T630/2/4 only) ........................................................... 45
7.1. Calibration ......................................................................................................... 45
8. 10-Bit Current Mode DAC (IDA0, C8051T630/2/4 only) ......................................... 48
8.1. IDA0 Output Scheduling .................................................................................... 48
8.1.1. Update Output On-Demand ...................................................................... 48
8.1.2. Update Output Based on Timer Overflow ................................................. 49
8.1.3. Update Output Based on CNVSTR Edge ................................................. 49
8.2. IDAC Output Mapping ....................................................................................... 49
9. Voltage Reference Options ..................................................................................... 52
10. Voltage Regulator (REG0) ..................................................................................... 55
11. Comparator0........................................................................................................... 57
11.1. Comparator Multiplexer ................................................................................... 61
12. CIP-51 Microcontroller........................................................................................... 63
12.1. Instruction Set.................................................................................................. 64
12.1.1. Instruction and CPU Timing .................................................................... 64
12.2. CIP-51 Register Descriptions .......................................................................... 69
13. Memory Organization ............................................................................................ 72
13.1. Program Memory............................................................................................. 73
13.2. Data Memory ................................................................................................... 73
13.2.1. Internal RAM ........................................................................................... 73
13.2.1.1. General Purpose Registers ............................................................ 74
13.2.1.2. Bit Addressable Locations .............................................................. 74
13.2.1.3. Stack ............................................................................................ 74
13.2.2. External RAM .......................................................................................... 74
14. Special Function Registers................................................................................... 76
Rev. 1.0
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