C8051T630 Datasheet, PDF (16/221 Pages) Silicon Laboratories – Mixed-Signal Byte-Programmable EPROM MCU

C8051T630/1/2/3/4/5
C2CK/RST
VDD
GND
Power On
Reset
Reset
Debug /
Programming
Hardware
C2D
Peripheral Power
CIP-51 8051
Controller Core
8/4/2k Byte EPROM
Program Memory
256 Byte SRAM
512 Byte XRAM
Regulator
Core Power
SYSCLK
EXTCLK
Precision
24.5 MHz
Oscillator
Low-Freq.
Oscillator
External
Oscillator
Circuit
System Clock
Configuration
SFR
Bus
Port I/O Configuration
Digital Peripherals
UART
Timers 0,
1, 2, 3
PCA/
WDT
Priority
Crossbar
Decoder
SMBus
SPI
Crossbar Control
Analog Peripherals
Voltage
10-bit
Reference _VREF IDAC _IDA0
VDD
VREF
10-bit
500ksps
ADC
VDD
A
M
U
Temp
X
Sensor
‘T630/2/4 Only
CP0, CP0A ₊
-
Comparator
Port 0
Drivers
Port 1
Drivers
Port 2
Drivers
Figure 1.1. C8051T630/1/2/3/4/5 Block Diagram
P0.0/VREF
P0.1/IDA0
P0.2/VPP
P0.3/EXTCLK
P0.4/TX
P0.5/RX
P0.6/CNVSTR
P0.7
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
P2.0/C2D
16
Rev. 1.0