C8051T630 Datasheet, PDF (10/221 Pages) Silicon Laboratories – Mixed-Signal Byte-Programmable EPROM MCU

C8051T630/1/2/3/4/5
List of Tables
2. Ordering Information
Table 2.1. Product Selection Guide ......................................................................... 17
3. Pin Definitions
Table 3.1. Pin Definitions for the C8051T630/1/2/3/4/5 ........................................... 18
4. QFN-20 Package Specifications
Table 4.1. QFN-20 Package Dimensions ................................................................ 21
Table 4.2. QFN-20 PCB Land Pattern Dimesions ................................................... 22
5. Electrical Characteristics
Table 5.1. Absolute Maximum Ratings .................................................................... 23
Table 5.2. Global Electrical Characteristics ............................................................. 24
Table 5.3. Port I/O DC Electrical Characteristics ..................................................... 25
Table 5.4. Reset Electrical Characteristics .............................................................. 26
Table 5.5. Internal Voltage Regulator Electrical Characteristics ............................. 26
Table 5.6. EPROM Electrical Characteristics .......................................................... 26
Table 5.7. Internal High-Frequency Oscillator Electrical Characteristics ................. 27
Table 5.8. Internal Low-Frequency Oscillator Electrical Characteristics ................. 27
Table 5.9. ADC0 Electrical Characteristics .............................................................. 28
Table 5.10. Temperature Sensor Electrical Characteristics .................................... 29
Table 5.11. Voltage Reference Electrical Characteristics ....................................... 29
Table 5.12. IDAC Electrical Characteristics ............................................................. 30
Table 5.13. Comparator Electrical Characteristics .................................................. 31
6. 12. CIP-51 Microcontroller
Table 12.1. CIP-51 Instruction Set Summary .......................................................... 65
14. Special Function Registers
Table 14.1. Special Function Register (SFR) Memory Map .................................... 76
Table 14.2. Special Function Registers ................................................................... 77
15. Interrupts
Table 15.1. Interrupt Summary ................................................................................ 82
16. EPROM Memory
Table 16.1. Security Byte Decoding ........................................................................ 90
20. Port Input/Output
Table 20.1. Port I/O Assignment for Analog Functions ......................................... 112
Table 20.2. Port I/O Assignment for Digital Functions ........................................... 112
Table 20.3. Port I/O Assignment for External Digital Event Capture Functions .... 113
21. SMBus
Table 21.1. SMBus Clock Source Selection .......................................................... 131
Table 21.2. Minimum SDA Setup and Hold Times ................................................ 132
Table 21.3. Sources for Hardware Changes to SMB0CN ..................................... 136
Table 21.4. Hardware Address Recognition Examples (EHACK = 1) ................... 137
Table 21.5. SMBus Status Decoding With Hardware ACK Generation Disabled
(EHACK = 0) ....................................................................................... 144
Table 21.6. SMBus Status Decoding With Hardware ACK Generation Enabled
(EHACK = 1) ....................................................................................... 146
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Rev. 1.0