SI5326C-C-GM Datasheet, PDF (29/72 Pages) Silicon Laboratories – ANY FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Si5326
Register 10.
Bit
D7
Name
D6
D5
Reserved
Type
R
Reset value = 0000 0000
D4
D3
D2
D1
D0
DSBL2_
REG
DSBL1_
REG
Reserved Reserved
R/W
R/W
R
R
Bit
Name
Function
7:4
Reserved Reserved.
3 DSBL2_REG DSBL2_REG.
This bit controls the powerdown of the CKOUT2 output buffer. If disable mode is
selected, the N2_LS output divider is also powered down.
0: CKOUT2 enabled
1: CKOUT2 disabled
2 DSBL1_REG DSBL1_REG.
This bit controls the powerdown of the CKOUT1 output buffer. If disable mode is
selected, the N1_LS output divider is also powered down.
0: CKOUT1 enabled
1: CKOUT1 disabled
1:0
Reserved Reserved.
Rev. 1.0
29