SI5326C-C-GM Datasheet, PDF (20/72 Pages) Silicon Laboratories – ANY FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

Si5326
5. Register Map
All register bits that are not defined in this map should always be written with the specified Reset Values. The
writing to these bits of values other than the specified Reset Values may result in undefined device behavior.
Registers not listed, such as Register 64, should never be written to.
Register
D7
D6
D5
D4
D3
D2
D1
D0
0
FREE_RUN CKOUT_
ALWAYS_
ON
BYPASS_
REG
1
CK_PRIOR2[1:0]
CK_PRIOR[1:0]
2
BWSEL_REG[3:0]
3
CKSEL_REG[1:0]
DHOLD
SQ_ICAL
4
AUTOSEL_REG[1:0]
HST_DEL[4:0]
5
ICMOS[1:0]
6
SLEEP
SFOUT2_REG[2:0]
SFOUT1_REG[2:0]
7
FOSREFSEL[2:0]
8
HLOG_2[1:0]
HLOG_1[1:0]
9
HIST_AVG[4:0]
10
DSBL2_
DSBL1_
REG
REG
11
PD_CK2
PD_CK1
16
CLAT[7:0]
17 FLAT_VALID
FLAT[14:8]
18
FLAT[7:0]
19
FOS_EN
FOS_THR[1:0]
VALTIME[1:0]
LOCK[T2:0]
20
CK2_
CK1_
LOL_PIN
INT_PIN
BAD_
BAD_
PIN
PIN
21
INCDEC_
PIN
CK1_ACTV_ CKSEL_PIN
PIN
22
CK_ACTV_ CK_BAD_ LOL_POL INT_POL
POL
POL
23
LOS2_MSK LOS1_MSK LOSX_MSK
24
FOS2_MSK FOS1_MSK LOL_MSK
25
N1_HS[2:0]
31
NC1_LS[19:16]
32
NC1_LS[15:8]
20
Rev. 1.0