SI4464 Datasheet, PDF (23/56 Pages) Silicon Laboratories – HIGH-PERFORMANCE

Si4464/63/61/60
3.4. Application Programming Interface (API)
An application programming interface (API), which the host MCU will communicate with, is embedded inside the
device. The API is divided into two sections, commands and properties. The commands are used to control the
chip and retrieve its status. The properties are general configurations which will change infrequently. The API
descriptions can be found in“AN625: Si446x API Descriptions”.
3.5. Interrupts
The Si446x is capable of generating an interrupt signal when certain events occur. The chip notifies the
microcontroller that an interrupt event has occurred by setting the nIRQ output pin LOW = 0. This interrupt signal
will be generated when any one (or more) of the interrupt events (corresponding to the Interrupt Status bits) occur.
The nIRQ pin will remain low until the microcontroller reads the Interrupt Status Registers. The nIRQ output signal
will then be reset until the next change in status is detected.
The interrupts sources are grouped into three groups: packet handler, chip status, and modem. The individual
interrupts in these groups can be enabled/disabled in the interrupt property registers, 0101, 0102, and 0103. An
interrupt must be enabled for it to trigger an event on the nIRQ pin. The interrupt group must be enabled as well as
the individual interrupts in API property 0100.
Number
0x20
0x21
0x22
0x23
Command
GET_INT_STATUS
GET_PH_STATUS
GET_MODEM_STATUS
GET_CHIP_STATUS
Summary
Returns the interrupt status—packet handler, modem,
and chip
Returns the packet handler status.
Returns the modem status byte.
Returns the chip status.
Number
0x0100
0x0101
0x0102
0x0103
Property
INT_CTL_ENABLE
INT_CTL_PH_ENABLE
INT_CTL_MODEM_ENABLE
INT_CTL_CHIP_ENABLE
Default
Summary
0x04
Enables interrupt groups for PH, Modem, and
Chip.
0x00 Packet handler interrupt enable property.
0x00 Modem interrupt enable property.
0x04 Chip interrupt enable property.
Once an interrupt event occurs and the nIRQ pin is low there are two ways to read and clear the interrupts. All of
the interrupts may be read and cleared in the “GET_INT_STATUS” API command. By default all interrupts will be
cleared once read. If only specific interrupts want to be read in the fastest possible method the individual interrupt
groups (Packet Handler, Chip Status, Modem) may be read and cleared by the “GET_MODEM_STATUS”,
“GET_PH_STATUS” (packet handler), and “GET_CHIP_STATUS” API commands.
The instantaneous status of a specific function maybe read if the specific interrupt is enabled or disabled. The
status results are provided after the interrupts and can be read with the same commands as the interrupts. The
status bits will give the current state of the function whether the interrupt is enabled or not.
The fast response registers can also give information about the interrupt groups but reading the fast response
registers will not clear the interrupt and reset the nIRQ pin.
Rev 1.2
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