HYB39S164400 Datasheet, PDF (7/64 Pages) Siemens Semiconductor Group – 16 MBit Synchronous DRAM

HYB39S16400/800/160BT-8/-10
16MBit Synchronous DRAM
CKE CKE Buffer
CLK
CLK Buffer
Self
Refresh Clock
Row
Address
Counter
A0
A1
A2
12
A3
A4
A5
A6
A7
A8
12
A9
A10
A11 (BS)
CS
CS Buffer
RAS RAS Buffer
CAS CAS Buffer
2048
2048 x 512
Memor2y0B48anxk2A56
Memory Bank A
Bank A
Row/Column
Select
11 ^{Predecode A}
3
Sense Amplifiers
16
Sense Amplifiers
Sense Amplifiers
Column DecoSdeenrsaendAmDpQlifGiearste
Column Decoder and DQ Gate
Column Decoder and DQ Gate
Column Decoder and DQ Gate
16
8
8
8
Data Latches ⁸
Data Latches
Sequential
Data Latches
Data Latches
Control
Bank A
16
8
11 ^{Mode Register}
8
Sequential
Control
3 _{Bank B}
16
11 Predecode B
Data Latches
Data Latches
8
Bank B
Row/Column
Select
16
16
Column Decoder and DQ Gate
Column DeScoedneser aAnmdpDlifQierGsate
Sense Amplifiers
16
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
WE
WE Buffer
UDQM ^{DQM Buffer}
LDQM ^{DQM Buffer}
2048
Memory Bank B
MMemeM2mo02er4o0my8r42Boy80xraB4yxn58aBk11nxa20Bkn22Bk456B
2048 x 1024
Block Diagram for HYB39S16160BT (2 banks x 512k x 16 SDRAM)
Semiconductor Group
7