HYB39S164400 Datasheet, PDF (6/64 Pages) Siemens Semiconductor Group – 16 MBit Synchronous DRAM

HYB39S16400/800/160BT-8/-10
16MBit Synchronous DRAM
CKE CKE Buffer
CLK
CLK Buffer
Self
Refresh Clock
Row
Address
Counter
A0
A1
A2
12
A3
A4
A5
A6
A7
A8
12
A9
A10
A11 (BS)
CS
CS Buffer
RAS
RAS Buffer
CAS
CAS Buffer
2048
2048 x 512
Memory Bank A
8
Bank A
Row/Column
Select
8
11 ^{Predecode A}
Sequential
3 _Control
Bank A
Sense Amplifiers
Sense Amplifiers
Column Decoder and DQ Gate
Column Decoder and DQ Gate
8
8
Data Latches
Data Latches
8
8
11 ^{Mode Register}
8
Sequential
Control
3 _{Bank B}
8
11 Predecode B
Data Latches
8
Bank B
8
Row/Column
Select
8
Column Decoder and DQ Gate
Sense Amplifiers
8
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
WE
WE Buffer
DQM ^{DQM Buffer}
2048
Memory Bank B
Mem2o0r4y8Bxan5k12B
2048 x 1024
Block Diagram for HYB39S16800BT (2 banks x 1M x 8 SDRAM)
Semiconductor Group
6