HYB39S164400 Datasheet, PDF (16/64 Pages) Siemens Semiconductor Group – 16 MBit Synchronous DRAM

HYB39S16400/800/160BT-8/-10
16MBit Synchronous DRAM
Parameter
Symbol
Limit Values
Unit
CAS(a) to CAS(b) Command period t_CCD
-8
min max
1
–
-10
min max
1
–
CLK
Refresh Cycle
Refresh Period
(4096 cycles)
Self Refresh Exit Time
t_REF
t_SREX
–
64
–
64 ms
10
10
ns
Read Cycle
Data Out Hold Time
Data Out to Low Impedance Time
Data Out to High Impedance Time
DQM Data Out Disable Latency
t_OH
3
–
3
– ns 2
t_LZ
0
–
0
– ns
t_HZ
3
8
3
10 ns 8
t_DQZ
2
–
2
– CLK
Write Cycle
Write Recovery Time
DQM Write Mask Latency
Write Latency
t_WR
8
t_DQW
0
t_WL
0
Frequency vs. AC Parameter Relationship Table:
-8 -parts
–
10
– ns
–
0
– CLK
–
0
– CLK
125 MHz
100 MHz
-10 -parts:
CL
tRC tRAS tRP tRRD tRCD tCCD t_WL
tWR
3
9
6
3
2
3
1
0
1
2
7
5
2
2
2
1
0
1
100 MHz
75 MHz
CL
tRC tRAS tRP tRRD tRCD tCCD WL tWR
3
8
6
3
2
3
1
0
1
2
7
5
2
2
2
1
0
1
Semiconductor Group
16