HYB39S164400 Datasheet, PDF (14/64 Pages) Siemens Semiconductor Group – 16 MBit Synchronous DRAM

HYB39S16400/800/160BT-8/-10
16MBit Synchronous DRAM
Operating Currents (T_A = 0 to 70^oC, VCC = 3.3V ± 0.3V
(Recommended Operating Conditions unless otherwise noted)
Parameter
Operating Current
Precharge
Standby Current
in Power Down
Mode
Precharge
Standby Current
in Non-power
down Mode
Active Standby
Current in Power
Down Mode
Active Standby
Current in Non-
power Down
Mode
Burst Operating
Current
Auto (CBR)
Refresh Current
Self Refresh
Symbol
Test Condition
CAS
Latency
Icc1 Burst Length = 4
1
trc>=trc (min.)
2
tck>=tck(min.), Io = 0mA
2 bank interleave operation
3
Icc2P CKE<=VIL(max),
tck>=tck(min.)
Icc2PS CKE<=VIL(max),
tCK=infinite
Icc2N
CKE>=VIH(min),
tck>=tck(min.) input signals
changed once in 3 cycles
Icc2NS CKE>=VIH(min),
tCK=infinite, input signals
are stable
Icc3P CKE<=VIL(max),
tck>=tck(min.)
Icc3PS CKE<=VIL(max),
tCK=infinite, inpit signals
are stable
Icc3N CKE>=VIH(min),
tck>=tck(min.),
changed once in 3 cycles
Icc3NS CKE>=VIH(min),
tCK=infinite, input signals
are stable
Icc4 Burst Length = full page
1
trc = infinite
2
tck >= tck (min.), IO = 0 mA
2 banks activated
3
Icc5 trc>=trc(min)
1
2
3
Icc6 CKE=<0,2V
-8 -10
Note
max. max.
80 65 mA 1, 2
115 90 mA
125 100 mA
3
3 mA
2
2 mA
20 20 mA CS=
High
10 10 mA
3
3 mA
2
2 mA
25 25 mA CS=
High,
1
15 15 mA
50 40 mA 1, 2
80 65
120 95
75 60 mA 1, 2
95 75 mA
115 90 mA
1¹
1 mA 1, 2
Notes:
1. The specified values are valid when addresses are changed no more than three times during trc(min.) and
when No Operation commands are registered on every rising clock edge during tRC(min).
2. The specified values are valid when data inputs (DQs’ ) are stable during tRC(min.).
Semiconductor Group
14