HYB39S64400 Datasheet, PDF (28/53 Pages) Siemens Semiconductor Group – 64 MBit Synchronous DRAM

HYB39S64400/800/160AT(L)
64MBit Synchronous DRAM
8.1 Termination of a Full Page Burst Read Operation
(CAS latency = 2, 3)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CLK
COMMAND ^{READ A}
CAS latency = 2
t_CK2, DQ’s
CAS latency = 3
t_CK3, DQ’s
NOP
NOP
NOP
Burst
Stop
NOP
NOP
DOUT A0
DOUT A1
DOUT A2
DOUT A3
NOP
DOUT A0
DOUT A1
DOUT A2
DOUT A3
NOP
The burst ends after a delay equal to the CAS latency.
8.2 Termination of a Full Page Burst Write Operation
(CAS Latency = 2, 3)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CLK
COMMAND ^NOP
CAS latency = 2,3,4
DQ’s
WRITE A
DIN A0
NOP
NOP
Burst
Stop
NOP
DIN A1
DIN A2
don’t care
Input data for the Write is masked.
NOP
NOP
NOP
Semiconductor Group
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