HYB39S64400 Datasheet, PDF (25/53 Pages) Siemens Semiconductor Group – 64 MBit Synchronous DRAM

HYB39S64400/800/160AT(L)
64MBit Synchronous DRAM
5. Burst Write Operation
(Burst Length = 4, CAS latency = 2, 3)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CLK
COMMAND ^NOP
WRITE A
NOP
NOP
NOP
NOP
NOP
NOP
NOP
DQ’s
DIN A0
DIN A1
DIN A2
DIN A3
don’t care
The first data element and the Write
are registered on the same clock edge.
Extra data is ignored after
termination of a Burst.
6.1 Write Interrupted by a Write
(Burst Length = 4, CAS latency = 2, 3)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CLK
COMMAND ^NOP
DQ’s
WRITE A
WRITE B
1 Clk Interval
DIN A0
DIN B0
NOP
DIN B1
NOP
DIN B2
NOP
DIN B3
NOP
NOP
NOP
Semiconductor Group
25