HYB39S64400 Datasheet, PDF (22/53 Pages) Siemens Semiconductor Group – 64 MBit Synchronous DRAM

1. Bank Activate Command Cycle
HYB39S64400/800/160AT(L)
64MBit Synchronous DRAM
(CAS latency = 3)
T0
T1
T
CLK
ADDRESS
Bank A
Row Addr.
COMMAND
: “H” or “L”
Bank A
Activate
t_RCD
NOP
NOP
T
T
T
..........
Bank A
Col. Addr.
..........
Bank B
Row Addr.
Write A
with Auto
Precharge
..........
Bank B
Activate
t_RC
t_RRD
NOP
T
Bank A
Row Addr.
Bank A
Activate
2. Burst Read Operation
(Burst Length = 4, CAS latency = 2, 3)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CLK
COMMAND ^{READ A}
NOP
CAS latency = 2
t_CK2, DQ’s
CAS latency = 3
t_CK3, DQ’s
NOP
NOP
NOP
NOP
NOP
NOP
DOUT A0
DOUT A1
DOUT A2
DOUT A3
DOUT A0
DOUT A1
DOUT A2
DOUT A3
NOP
Semiconductor Group
22