LC89058W-E Datasheet, PDF (38/64 Pages) Sanyo Semicon Device – Digital Audio Interface Receiver

LC89058W-E
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12. Microcontroller Interface ( INT , CL, CE, DI, DO)
12.1 Description of Micr_{_}o_{_}c_{_}o_{_} ntroller Interface
12.1.1 Interrupt output (INT)
• Interrupts is output when a change has occurred in the PLL lock status or output data information.
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• Interrupt output consists of the register for selecting the interrupt source, the INT pin that outputs that state transition,
and the registers that store the interrupt source data.
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• Normally INT is held “H” and output “L” upon occurrence of an interrupt. Following “L” output, it is cleared and
returns to “H” immediately when the interrupt source output register is readout.
• The interrupt sources can be selected among the following items. Multiple sources can be selected at the same time
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with the contents of CCB address 0xE8 and command address 8. INT outputs OR calculation result of the selected
interrupt sources.
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INT
output
=
(selected
source
1)
+
(selected
source
2)
+
...
+
(selected
source
n)
Table 12.1 Interrupt Source Setting Contents
No.
Command Name
Description
1
ERROR
Output when RERR pin status has changed
2
INDET
Output when input data pin status has changed (subject to oscillation amplifier operation condition)
3
FSCHG
Output when input fs calculation result has changed. (subject to oscillation amplifier condition)
4
CSRNW
Output when channel status data of first 48 bits have updated
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5
UNPCM
Output when AUDIO pin status has changed
6
PCRNW
Output when burst preamble Pc has been updated
7
GPIO
Output when the state of input data changes when the general-purpose I/O parallel input is set.
8
EMPF
Output when emphasis information has changed
• The contents of set interrupt source are saved in output registers DO8 to DO15 of CCB address 0xEA, when the
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source occurs. However, for the read registers for source items 1 and 5, the each status of the RERR and AUDIO pins
are output at the time of reading. Other data except for source items 1 and 5 are saved in the registers upon occurrence
of an interrupt source.
• Concerning source items 2 and 3, the oscillation amplifier clock is used. Therefore, if the status is monitored even
while the PLL is locked, the oscillation amplifier must be set to the continuous operation mode.
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• Clearing INT at the same time of readout of an output register is carried out immediately after the output register
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0xEA is set. However, INT is not cleared other than the 0xEA setting.
No.A1056-38/64