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LC89058W-E Datasheet, PDF (34/64 Pages) Sanyo Semicon Device – Digital Audio Interface Receiver
LC89058W-E
10.4.5 Data processing upon occurrence of errors (lock error, parity error)
• The data processing upon occurrence of an error is described below. If 8 or fewer input parity errors occur in
succession and transfer data is PCM audio data, the data is replaced by the one saved each in L-ch and R-ch in the
previous frame. However, if the transfer data is non-PCM data, the error data is output as it is.
• Non-PCM data is the data of when bit 1 (audio sample word) of the channel status turns to "H" based on the data
detected prior to the occurrence of the input parity error.
• Output data is muted when a PLL lock error occurs or a parity error occurs 9 or more times in succession.
• As for the channel status output, the data of the previous block is held in 1-bit units when a parity error occur 8 or
fewer times in succession.
Table 10.6 Data Processing upon Error Occurrence
Data
PLL Lock Error
Input Parity Error (a)
Input Parity Error (b)
Demodulation data
“L”
“L”
Previous value data
fs calculation result
“L”
Output
Output
Channel status
“L”
“L”
Previous value data
* Input parity error (a): If occurs 9 or more times in succession
* Input parity error (b): If occurs 8 or fewer times in succession, in case of audio data
* Input parity error (c): If occurs 8 or fewer times in succession, in case of non-PCM burst data
Input Parity Error (c)
Output
Output
Previous value data
1occurrence
Input data L-1 R-1 L-2 R-2 L-3 R-3 L-4 R-4 L-5 R-5 L-6 R-6 L-7 R-7 L-8 R-8
RERR
RLRCK
RDATA
L-0 R-0 L-1 R-0 L-2 R-2 L-2 R-2 L-2 R-2 L-2 R-2 L-2
R-ch
Previous
value data
L-ch R-ch
Previous
value data
9 times or more: Muting
Figure 10.12 Example of Data Processing upon Parity Error Occurrence
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