K4B2G1646C-HCF8000 Datasheet, PDF(64/64 Page) Samsung semiconductor – 2Gb C-die DDR3 SDRAM Only x16 96FBGA with Lead-Free & Halogen-Free (RoHS compliant)

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K4B2G1646C-HCF8000 Datasheet, PDF (64/64 Pages) Samsung semiconductor – 2Gb C-die DDR3 SDRAM Only x16 96FBGA with Lead-Free & Halogen-Free (RoHS compliant)

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K4B2G1646C

datasheet

Rev. 1.11

DDR3 SDRAM

NOTE :Clock and Strobe are drawn on a different time scale.

tIS

tIH

DQS

VDDQ

tDS tDH

VIH(AC) min

VIH(DC) min

dc to VREF

region

VREF(DC)

dc to VREF

region

VIL(DC) max

tangent

line

VIL(AC) max

tIS tIH

tDS tDH

nominal

line

tangent

line

nominal

line

VSS

â TR

â TF

Hold Slew Rate

Rising Signal

tangent line [ VREF(DC) - VIL(DC)max ]

â TR

Hold Slew Rate

Falling Signal

tangent line [ VIH(DC)min - VREF(DC) ]

â TF

Figure 28. Illustration of tangent line for hold time tDH (for DQ with respect to strobe) and tIH

(for ADD/CMD with respect to clock)

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