K4B2G1646C-HCF8000 Datasheet, PDF(55/64 Page) Samsung semiconductor – 2Gb C-die DDR3 SDRAM Only x16 96FBGA with Lead-Free & Halogen-Free (RoHS compliant)

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K4B2G1646C-HCF8000 Datasheet, PDF (55/64 Pages) Samsung semiconductor – 2Gb C-die DDR3 SDRAM Only x16 96FBGA with Lead-Free & Halogen-Free (RoHS compliant)

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K4B2G1646C

datasheet

Rev. 1.11

DDR3 SDRAM

NOTE :Clock and Strobe are drawn on a different time scale.

tIS

tIH

DQS

tIS tIH

DQS

VDDQ

tDS tDH

VIH(AC) min

VREF to ac

region

VIH(DC) min

VREF(DC)

VIL(DC) max

nominal slew

rate

VIL(AC) max

VSS

tVAC

tDS tDH

tVAC

nominal

slew rate

VREF to ac

region

â TF

Setup Slew Rate

Falling Signal

VREF(DC) - VIL(AC)max

â TF

â TR

Setup Slew Rate

Rising Signal

VIH(AC)min - VREF(DC)

â TR

Figure 21. Illustration of nominal slew rate and tVAC for setup time tDS (for DQ with respect to strobe) and tIS

(for ADD/CMD with respect to clock).

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