K4B2G1646C-HCF8000 Datasheet, PDF (54/64 Pages) Samsung semiconductor – 2Gb C-die DDR3 SDRAM Only x16 96FBGA with Lead-Free & Halogen-Free (RoHS compliant)

K4B2G1646C
datasheet
Rev. 1.11
DDR3 SDRAM
[ Table 55 ] Derating values DDR3-1866/2133 tIS/tIH-AC/DC based - Alternate AC125 Threshold
∆tIS, ∆tIH Derating [ps] AC/DC based
Alternate AC125 Threshold -> V_IH(AC) = V_REF(DC) + 125mV, V_IL(AC) = V_REF(DC) - 125mV
CLK,CLK Differential Slew Rate
4.0 V/ns
3.0 V/ns
2.0 V/ns
1.8 V/ns
1.6 V/ns
1.4V/ns
1.2V/ns
∆tIS ∆tIH ∆tIS ∆tIH ∆tIS ∆tIH ∆tIS ∆tIH ∆tIS ∆tIH ∆tIS ∆tIH ∆tIS ∆tIH
2.0
63
50
63
50
63
50
71
58
79
66
87
74
95
84
1.5
42
34
42
34
42
34
50
42
58
50
66
58
74
68
1.0
0
0
0
0
0
0
8
8
16
16
24
24
32
34
CMD/
ADD ^0.9
4
-4
4
-4
4
-4
12
4
20
12
28
20
36
30
Slew 0.8
6
-10
6
-10
6
-10 14
-2
22
6
30
14
38
24
rate _0.7
11
-16
11
-16
11
-16
19
-8
27
0
35
8
43
18
V/ns
0.6 16 -26 16 -26 16 -26 24 -18 32 -10 40
-2
48
8
0.5 15 -40 15 -40 15 -40 23 -32 31 -24 39 -16 47
-6
0.4 13 -60 13 -60 13 -60 21 -52 29 -44 37 -36 45 -26
1.0V/ns
∆tIS ∆tIH
103 100
82
84
40
50
44
46
46
40
51
34
56
24
55
10
53 -10
[ Table 56 ] Required time t_VAC above V_IH(AC) {blow V_IL(AC)} for valid ADD/CMD transition
Slew Rate[V/ns]
>2.0
2.0
1.5
1.0
0.9
0.8
0.7
0.6
0.5
< 0.5
t_VAC @175mV [ps]
min
max
75
-
57
-
50
-
38
-
34
-
29
-
22
-
13
-
0
-
0
-
t_VAC @150mV [ps]
min
max
175
-
170
-
167
-
163
-
162
-
161
-
159
-
155
-
150
-
150
-
t_VAC @135mV [ps]
min
max
TBD
-
TBD
-
TBD
-
TBD
-
TBD
-
TBD
-
TBD
-
TBD
-
TBD
-
TBD
-
t_VAC @125mV [ps]
min
max
TBD
-
TBD
-
TBD
-
TBD
-
TBD
-
TBD
-
TBD
-
TBD
-
TBD
-
TBD
-
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