K4B2G1646C-HCF8000 Datasheet, PDF (32/64 Pages) Samsung semiconductor – 2Gb C-die DDR3 SDRAM Only x16 96FBGA with Lead-Free & Halogen-Free (RoHS compliant)

K4B2G1646C
datasheet
[ Table 35 ] IDD2NT and IDDQ2NT Measurement - Loop Pattern¹⁾
Rev. 1.11
DDR3 SDRAM
0
0
D
1
0
0
0
0
0 00 0
0
0
0
-
1
D
1
0
0
0
0
0 00 0
0
0
0
2
D
1
1
1
1
0
0 00 0
0
F
0
3
D
1
1
1
1
0
0 00 0
0
F
0
1
4-7
repeat Sub-Loop 0, but ODT = 0 and BA[2:0] = 1
2
8-11
repeat Sub-Loop 0, but ODT = 1 and BA[2:0] = 2
3
12-15
repeat Sub-Loop 0, but ODT = 1 and BA[2:0] = 3
4
16-19
repeat Sub-Loop 0, but ODT = 0 and BA[2:0] = 4
5
20-23
repeat Sub-Loop 0, but ODT = 0 and BA[2:0] = 5
6
24-27
repeat Sub-Loop 0, but ODT = 1 and BA[2:0] = 6
7
28-31
repeat Sub-Loop 0, but ODT = 1 and BA[2:0] = 7
NOTE :
1. DM must be driven Low all the time. DQS, DQS are MID-LEVEL.
2. DQ signals are MID-LEVEL.
[ Table 36 ] IDD4R and IDDQ4R Measurement - Loop Pattern¹⁾
0
0
RD
0
1
0
1
0
0 00 0
0
0
0
1
D
1
0
0
0
0
0 00 0
0
0
0
2,3
D,D
1
1
1
1
0
0 00 0
0
0
0
4
RD
0
1
0
1
0
0 00 0
0
F
0
5
D
1
0
0
0
0
0 00 0
0
F
0
6,7
D,D
1
1
1
1
0
0 00 0
0
F
0
1
8-15
repeat Sub-Loop 0, but BA[2:0] = 1
2
16-23
repeat Sub-Loop 0, but BA[2:0] = 2
3
24-31
repeat Sub-Loop 0, but BA[2:0] = 3
4
32-39
repeat Sub-Loop 0, but BA[2:0] = 4
5
40-47
repeat Sub-Loop 0, but BA[2:0] = 5
6
48-55
repeat Sub-Loop 0, but BA[2:0] = 6
7
56-63
repeat Sub-Loop 0, but BA[2:0] = 7
NOTE :
1. DM must be driven LOW all the time. DQS, DQS are used according to WR Commands, otherwise MID-LEVEL.
2. Burst Sequence driven on each DQ signal by Write Command. Outside burst operation, DQ signals are MID-LEVEL.
00000000
-
-
00110011
-
-
- 32 -