HD404818 Datasheet, PDF (96/100 Pages) Hitachi Semiconductor – 16-digit LCD driver

HD404818 Series
During Transmit Clock Input
Item
Symbol Pin(s) Min Typ Max Unit Test Condition Notes
Transmit clock cycle time
t _Scyc
SCK 1
t _cyc /
1, 4
t _subcyc
Transmit clock high and low t , _SCKH
SCK 0.5
t _Scyc
1
widths
t _SCKL
Transmit clock rise and fall t , _SCKr
SCK
200 ns
1
times
t _SCKf
Serial output data delay time t_DSO
SO
500 ns
1, 2
Serial input data setup time t_SSI
SI
300
ns
1
Serial input data hold time t_HSI
SI
300
ns
1
Transmit clock completion
detect time
t _SCKHD
SCK 1
t _cyc /
t _subcyc
1, 2,
3, 4
Notes: 1. See figure 51.
2 See figure 52.
3. The transmit clock completion detect time is the high level period after 8 pulses of transmit
clocks are input. The serial interrupt request flag is not set if the next transmit clock is input
before the transmit clock completion detect time has passed.
4. t_subcyc is applied when the MCU is in subactive mode. t_subcyc = 244.14 µs (for a 32.768-kHz crystal
oscillator).
OSC₁
V_CC – 0.3 V
0.3 V
1/f_CP
t_CPH
t_CPL
t_CPr
t_CPf
Figure 48 Oscillator Timing
INT₀, INT₁
0.9V_CC
0.1V_CC
t_IH
t_IL
Figure 49 Interrupt Timing
RESET
0.9V_CC
0.1V_CC
t_RSTH
t_RSTf
Figure 50 Reset Timing
94