HD404818 Datasheet, PDF (60/100 Pages) Hitachi Semiconductor – 16-digit LCD driver

HD404818 Series
STS waiting state
Octal counter = 000
transmit clock disable
Transmit clock wait state
(Octal counter = 000)
Transmit clock
8 external transmit clocks
STS instruction
(IFS ← 1)
Transfer state
(Octal counter ≠ 000)
Figure 30 Serial Interface Operation States
Example of Transmit Clock Error Detection: The serial interface malfunctions when the transmit clock
is disturbed by external noise. In this case, transmit clock errors can be detected by the procedure shown in
figure 31.
If more than 8 transmit clocks are applied in the transmit clock wait state, the state of the serial interface
shifts in the following sequence: transfer state, transmit clock wait state, and transfer state again. The serial
interrupt request flag should be reset before entering into the STS waiting state by writing data to SMR.
This procedure causes the serial interface request flag to be set again.
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