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HD404818 Datasheet, PDF (13/100 Pages) Hitachi Semiconductor – 16-digit LCD driver
HD404818 Series
RAM Memory Map
The MCU also contains a 1,184-digit × 4-bit RAM as the data and stack area. In addition to these areas,
interrupt control bits and special function registers are mapped on the RAM memory space. The RAM
memory map (figure 2) is described in the following paragraphs.
Interrupt Control Bits Area ($000 to $003): The interrupt control bits area (figure 3) is used for interrupt
control. It is accessible only by RAM bit manipulation instructions. However, the interrupt request flag
cannot be set by software. The RSP bit is used only to reset the stack pointer.
Special Function Registers Area ($004 to $01F, $024 to $03F): The special function registers are the
mode or data registers for the serial interface, timer/counters, LCD, and the data control registers for the
I/O ports. These registers are classified into three types: write-only, read-only, and read/write as shown in
figure 2.
The SEM/REM and SEMD/REMD instructions are available for the LCD control register (LCR).
Other registers cannot be accessed by RAM bit manipulation instructions.
Register Flag Area ($020 to $023): Consist of the LSON, WDON, TGSP, and DTON flags which are bit
registers accessible by the RAM bit manip ula tion instruction.
The WDON flag can only be set, and only by the SEM/SEMD instruction.
The DTON flag can be set, reset, and tested by the SEM/SEMD, REM/REMD, and TMD instructions. Note
that the DTON flag is active only in subactive mode, and is normally reset in active mode.
LCD Data Area ($050 to $06F): Locations $050 to $06F store the LCD data which is automatically
transmitted to the segment driver as display data. The LCD is illuminated with 1s and faded with 0s. This
area can be used as a data area.
Data Area ($040 to $2CF, $100 to $2CF; Bank 0/1): The 16 digits of $040 through $04F are called
memory registers (MR) and are accessible by the LAMR and XMRA instructions (figure 4). 464 digits of
$100 through $2CF are selected as bank 0 or 1 depending on the value of the V register.
Stack Area ($3C0 to $3FF): Locations $3C0 through $3FF are reserved for LIFO stacks to save the
contents of the program counter (PC), status flag (ST), and carry flag (CA) when subroutine calls (CAL or
CALL instruction) and interrupts are processed. This area can be used as a 16-level nesting stack in which
one level requires 4 digits.
Figure 4 shows the save condition. The program counter is restored by the RTN and RTNI instructions. The
status and carry flags are restored only by the RTNI instruction. This area, when not used as a stack, is
available as a data area.
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