HD404818 Datasheet, PDF (67/100 Pages) Hitachi Semiconductor – 16-digit LCD driver

Table 29 LCD Frame Frequency
Static
Instruction
cycle time
10 µs
1 µs
LMR
Bit 3
0
Bit 2
0
CL0
512 Hz
512 Hz
Bit 3
0
Bit 2
1
CL1
390.6 Hz
3906 Hz
HD404818 Series
Bit 3
1
Bit 2
0
CL2
48.8 Hz
488Hz
Bit 3
1
Bit 2
1
CL3*
24.4 Hz/64 Hz
244 Hz/64 Hz
1/2 Duty Cycle
Instruction
cycle time
10 µs
1 µs
LMR
Bit 3
0
CL0
256 Hz
256 Hz
Bit 2
0
Bit 3
0
Bit 2
1
CL1
195.3 Hz
1953 Hz
Bit 3
1
Bit 2
0
CL2
24.4 Hz
244 Hz
Bit 3
1
Bit 2
1
CL3*
12.2 Hz/32 Hz
122 Hz/32 Hz
1/3 Duty Cycle
Instruction
cycle time
10 µs
1 µs
LMR
Bit 3
0
Bit 2
0
CL0
170.6 Hz
170.6 Hz
Bit 3
0
Bit 2
1
CL1
130.2 Hz
1302 Hz
Bit 3
1
Bit 2
0
CL2
16.3 Hz
162.6 Hz
Bit 3
1
Bit 2
1
CL3*
8.1 Hz/21.3 Hz
81.3 Hz/21.3 Hz
LMR
1/4 Duty Cycle Bit 3
Bit 2
Bit 3
Bit 2
Bit 3
Bit 2
Bit 3
Bit 2
Instruction
0
0
0
1
1
0
1
1
cycle time
CL0
CL1
CL2
CL3*
10 µs
128 Hz
97.7 Hz
12.2 Hz
6.1 Hz/16 Hz
1 µs
128 Hz
977 Hz
122 Hz
61 Hz/16 Hz
Note: * Division ratio differs depending on the value of bit 3 of timer mode register A
(TMA3 = 0/TMA3 = 1).
If TMA3 = 0, CL3 = fcyc x duty cycle/4096; if TMA3 = 1, CL3 = 32.768 kHz x duty cycle/512.
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