HD404818 Datasheet, PDF (38/100 Pages) Hitachi Semiconductor – 16-digit LCD driver

HD404818 Series
• When the MCU is in watch mode or subactive mode, if the high level period before the falling edge of
INT₀ is shorter than the interrupt frame, INT₀ is not be detected. Also, if the low level period after the
falling edge of INT₀ is shorter than the interrupt frame, INT₀ is not be detected.
Edge detection is shown in figure 18. The level of the INT₀ signal is sampled by a sampling clock.
When this sampled value changes to low from high, a falling edge is detected.
In figure 19, the level of the INT₀ signal is sampled by an interrupt frame. In (a) the sampled value is
low at point A, and also low at point B. Therefore, a falling edge is not detected. In (b), the sampled
value is high at point A, and also high at point B. A falling edge is not detected in this case either.
When the MCU is in watch mode or subactive mode, keep the high level and low level period of INT₀
longer than the interrupt frame.
INT₀
Sampling
High
Low
Low
Figure 18 Edge Detection
INT₀
INT₀
Interrupt
frame
A: Low
B: Low
Interrupt
frame
A: High
B: High
(a) High level period
(b) Low level period
Figure 19 Sampling Example
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