HD404818 Datasheet, PDF (26/100 Pages) Hitachi Semiconductor – 16-digit LCD driver

HD404818 Series
Table 7 Timer A Interrupt Request Flag
IFTA
0
1
Interrupt Request
No
Yes
Timer A Interrupt Mask (IMTA: $001, Bit 3): The timer A interrupt mask prevents an interrupt request
from being generated by the timer A interrupt request flag (table 8).
Table 8 Timer A Interrupt Mask
IMTA
0
1
Interrupt Request
Enabled
Disabled (masked)
Timer B Interrupt Request Flag (IFTB: $002, Bit 0): The timer B interrupt request flag is set by the
overflow output of timer B (table 9).
Table 9 Timer B Interrupt Request Flag
IFTB
0
1
Interrupt Request
No
Yes
Timer B Interrupt Mask (IMTB: $002, Bit 1): The timer B interrupt mask prevents an interrupt request
from being generated by the timer B interrupt request flag (table 10).
Table 10 Timer B Interrupt Mask
IMTB
0
1
Interrupt Request
Enabled
Disabled (masked)
Timer C Interrupt Request Flag (IFTC: $002, Bit 2): The timer C interrupt request flag is set by the
overflow output of timer C (table 11).
Table 11 Timer C Interrupt Request Flag
IFTC
0
1
Interrupt Request
No
Yes
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